ATA Interface Origins
The ATA interface evolved from the Advanced Technology (AT) interface developed originally for the IBM PC/AT computer in the mid-1980s. However, it wasn't until the late 1980s that the implementation of the ATA interface as we recognize it today was developed. The modern ATA interface is the result of collaborative efforts by Imprimis Division of Control Data Corporation (CDC), Western Digital Corporation, and Compaq Computer Corporation. These companies combined elements of the original AT interface with HDD and controller electronics to produce the first integrated ATA interface.

Serial ATA Interface Origins
An association of seven leading PC technology companies developed a Serial Advanced Technology Attachment (ATA) storage interface for hard-disk drives (HDDs) and ATA Packet Interface (ATAPI) devices that is expected to replace the current Parallel ATA interface.

Compared with Parallel ATA, Serial ATA will have lower signaling voltages and reduced pin count, will be faster and more robust, and will have a much smaller cable. Serial ATA will also be completely software compatible with Parallel ATA.

The Serial ATA Working Group was formed in 1999 to begin work on the Serial ATA specification. The target date for completing the specification is November, 2000. Serial ATA Working Group member companies include APT Technologies, Dell, IBM, Intel, Maxtor, Quantum, and Seagate Technologies.

To provide a framework for comparing the two interfaces, this article begins with a review of the current Parallel ATA interface technology, describes its strengths and weaknesses, and then introduces Parallel ATA's successor, Serial ATA.

Overview of the ATA Interface
Introduced in the 1980s, the Parallel ATA interface has been the dominant PC storage interface protocol for desktop and portable computers. Parallel ATA's relative simplicity, high performance, and low cost has enabled it to meet and maintain the cost/performance ratio that is essential in the mainstream desktop and portable computer systems market.

Parallel ATA's longevity can be attributed to frequent improvements in the interface's speed and overall performance. For example, ATA's data transfer speed has increased steadily from an initial rate of less than 3 megabytes per second (MB/sec) to its current maximum burst data transfer rate of up to 66 MB/sec. Other evolutionary improvements that have helped the interface to keep up with overall internal system data rate requirements are described in the following section.

Evolutionary Improvements
Despite a number of limitations, constant evolutionary improvements in the ATA interface have enabled it to remain competitive with other storage interface technologies. Improvements include:

• Enhanced Integrated Drive Electronics (EIDE) extensions for faster HDD access and logical block addressing (LBA)
  
• ATAPI for support of other peripheral devices, such as CD-ROM drives and tape drives
  
• Multiple data-transfer modes, including Programmed Input/Output (PIO), direct memory access (DMA), and Ultra DMA (UDMA)
  
• Backward compatibility with older ATA devices
  
• Cyclic redundancy checking (CRC) for improved data protection and greater overall data integrity

Ultra ATA-100
Ultra ATA-100 is the latest-generation Parallel ATA interface. With its maximum burst data transfer rate of 100 MB/sec, it supersedes the current Ultra ATA-66 interface. Ultra ATA-100 will likely be the last Parallel ATA interface before the industry completes its transition to Serial ATA.

Limitations of the Parallel ATA Interface
In spite of its success, the Parallel ATA interface has a long history of design issues. Most of these issues have been successfully worked around, overcome, or simply ignored. They include:

• 5-volt signaling requirement and high pin count (40-pin cable connectors)
  
• 18-inch cable length limitation; cable width and cable routing problems
  
• Data robustness issues

5-Volt Signaling Requirement
Parallel ATA's 5-volt signaling requirement will be increasingly difficult to meet as the industry continues to reduce chip core voltages. Parallel ATA has 26, 5-volt signals per ATA channel, requiring the use of large physical chip pads to accommodate the high pin count. As chip sizes are reduced, the large pads will ultimately dominate the chip.

Cable Issues
The 18-inch cable length limitation can be a serious issue with the current Parallel ATA interface. Depending on PC chassis size and the design and location of internal media bays, the limited cable length complicates peripheral expansion choices, making some internal drive configurations impossible to implement.
The wide, flat ribbon cables of the Parallel ATA bus are difficult to route, and their shape and bulk can restrict air flow and create hot spots inside the chassis.

Data Robustness
Data robustness has been a long-standing issue with Parallel ATA. No form of data checking was designed into the Parallel ATA interface during its early development. However, when the first UDMA mode was introduced, a degree of data protection was added in the form of CRC, which enabled the verification of interface data for the first time. Unfortunately, ATA command data is still not checked and remains a potential error source.

Alternative Interface Technologies
In recent years, two alternative serial interface technologies¡XUniversal Serial Bus (USB) and IEEE 1394¡Xhave been proposed as possible replacements for the Parallel ATA interface. However, neither interface has been able to offer the combination of low cost and high performance that has been the key to success of the traditional Parallel ATA interface.

Universal Serial Bus
USB is a supervised serial-bus architecture that provides manageable connectivity for a large number of external devices. Up to 127 devices can be supported from a single port in a tiered-star topology.
USB version 1.1 supports two data transfer speeds¡X1.5 megabits per second (Mbps) and 12 Mbps. For now, USB 1.1 is best suited for low-cost, low-bandwidth external peripherals such as keyboards, mice, modems, and Integrated Services Digital Network (ISDN) connections.
Second-generation USB version 2.0 offers maximum burst data transfer rates of up 480 Mbps. This higher speed makes USB 2.0 suitable for use with fast external storage devices. USB 2.0 storage products are expected to be available late in the year.

IEEE 1394
IEEE 1394 is a high-speed serial bus that permits unsupervised peer-to-peer data transfers between peripherals. Currently it supports 100, 200, and 400 Mbps. Future extensions are expected to support data-transfer rates of 1.6 to 3.2 gigabits per second (Gbps). IEEE 1394 supports both asynchronous and isochronous data transfers, making it suitable for high-bandwidth peripherals including HDDs, high-resolution color printers, scanners, and video conference equipment. At present, the interface is primarily used with external consumer electronics applications.

The Serial ATA Solution
Serial ATA is expected to eliminate the limitations of the current Parallel ATA interface. Because the Serial ATA architecture changes the physical interface layer only, it maintains register compatibility and software compatibility with Parallel ATA. No device driver changes are necessary and the Serial ATA architecture is transparent to the BIOS and the operating system.

Benefits of Serial ATA
Serial ATA offers a number of benefits over Parallel ATA, including:

• Reductions in voltage and pin count
  
• Smaller, easier-to-route cables; elimination of the cable-length limitation
  
• Improved data robustness
  
• Backward compatibility

Voltage Reduction
Serial ATA's low-voltage requirement (500 millivolts [mV] peak-to-peak) will effectively alleviate the increasingly difficult-to-accommodate 5-volt signaling requirement that hampers the current Parallel ATA interface.

Cabling
The Serial ATA architecture replaces the wide Parallel ATA ribbon cable with a thin, flexible cable that can be up to 1 meter in length. The serial cable is smaller and easier to route inside the chassis. The small-diameter cable can help improve air flow inside the PC system chassis and will facilitate future designs of smaller PC systems.
The lower pin count of the smaller Serial ATA connector will eliminate the need for the large and cumbersome 40-pin connectors required by Parallel ATA.

Improved Data Robustness
Serial ATA will offer more thorough error checking and error correcting capabilities than are currently available with Parallel ATA. The end-to-end integrity of transferred commands and data can be guaranteed across the serial bus.

Backward Compatibility
Serial ATA will provide backward compatibility for legacy Parallel ATA and ATAPI devices. This can be accomplished by two methods:

• Using chip sets that support Parallel ATA devices in conjunction with discrete components that support Serial ATA devices. It supports a mix of serial and parallel channels.

Using serial and parallel dongles, which adapt parallel devices to a serial controller or adapt serial devices to a parallel controller (CI-1421 and CI-1424).

Serial ATA Road Map
Serial ATA is planned as the foundation of a new storage interface replacement architecture that is as cost-effective as Parallel ATA and has greater performance improvement potential.
Serial ATA releases will generally follow this road map (dates are approximate):

• First-generation Serial ATA ¡X Expected to ship in 2001. The first release of the interface will support data transfer rates of up to 150 MB/sec.
  
• Second-generation Serial ATA ¡X When second generation Serial ATA becomes available, it will support data transfer rates of up to 300 MB/sec.
  
• Third-generation Serial ATA ¡X When third generation Serial ATA becomes available, it will support data transfer rates of up to 600 MB/sec.

For More Information

• Serial ATA Working Group Web page: http://www.serialata.org
  
• USB Web page: http://www.usb.org
  
• 1394 Trade Association: http://www.1394ta.org